1) FPGA-based Implementation of High-speed Protocols

Study the feasibility of using FPGAs for implementing critical functions of high-speed protocols in network cards:

Several high-speed transport protocols (including one being designed in our group) rely on fine-grained delay and inter-packet spacing information for estimating quantities like the spare bandwidth on a path. Unfortunately, for end-to-end capacities in the gigabit range, current PC platforms are hardly able to provide accurate, predictable, and fine-grained timestamping.

In this project, we will study the fesibility of relying specially-designed FPGA-based network interface cards for achieving timestamping accuracy of the order of a few micro-seconds.

Research-components/open-issues in this project:

  • This project would investigate data-structures and streamlined code that help facilitate accurate timestamping. It is also likely to yields guidelines for the memory and computation limits that future high-speed protocols ought to satisfy. This project would be done in collaboration with researchers at RENCI .
  • A second issue that would need to be addressed in the redesign of a traditional software-only protocol-stack to be able to efficiently exploit the availability of the above-mentioned NIC-based accurate timestamping. This would be explored in the context of the RAPID congestion-control protocl being designed in our group.